The exact mechanism of out-of-order program flow was explained in this slide:
In a nutshell:
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I will illustrate the branch mechanism by updating the Program Counter (PC) explicitly
The original assembler program that illustrates the branch instruction:
.text
main:
mov r1, #1111 // Instructions executed in sequence
mov r2, #1111 // "normal" program flow
mov r3, #1111
b there // Updates PC, set PC = address there
mov r4, #2222 // These instructions are SKIPPED over !
mov r5, #2222
mov r6, #2222
there:
mov r4, #4444 // Out of order program flow
mov r5, #4444
mov r6, #4444
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I will show you an equivalent program that updates the PC register explicitly...
We can achieve the (same) effect of the branch instruction by updating the pc register:
.text
main:
mov r1, #1111 // Instructions executed in sequence
mov r2, #1111 // "normal" program flow
mov r3, #1111
movw r0, #:lower16:there // Updates PC, set PC = address there
movt r0, #:upper16:there
mov pc, r0
mov r4, #2222 // These instructions are SKIPPED over !
mov r5, #2222
mov r6, #2222
there:
mov r4, #4444 // Out of order program flow
mov r5, #4444
mov r6, #4444
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DEMO: /home/cs255001/demo/asm/6-if/impl-branch.s