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Signals (variables !!!)

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• Named and unnamed Signals
  • Important note:

    Every signal used in the circuit simulation must be defined !!! Every signal has a unique identifier A signal can optionally has a display name

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  • Named and unnamed signals:

    Most signals will not be displayed (= shown to the user) The signals that you do want to display will usually receive a display name

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  • Example: how an unnamed signal is displayed:

  • Example: how an named signal (called MyOutput) is displayed:

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• Defining signals

  • Defining signals:

    Signal signalName; // Defines an unnamed signal Signal signalName( 1, "DisplayName" ); // Define one named signal ("DisplayName") Sig( signalName, 1 ); // Shorthand for: Signal signalName(1, "signalName")

    Examples:

    Signal a; // Unnamed Signal a(1, "MySignal"); // The signal is identified as "a" and // displayed with the name "MySignal" Sig(a, 1); // Same as: Signal a(1, "a"); // The signal is identified (name) as "a" and // displayed with the name "a"

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• Important note on Signals

  • Important Note:

    A Signal typed variable is always an array variable in logic-sim Furthermore: The signal x[0] is always equal to the signal x That's why the signal out is displayed as out[0] in the circuit simulation: