CS355 Sylabus

Controlling the CPU Micro Architecture

Recall that the purpose of the datapath is to execute the command encoded in a micro instruction.
The datapath is wired in such a way that the following steps must be done in exactly the sequence below for the datapath to operate correctly:
1. Fetch the proper operands into the A-latch/MBR and B-latch
2. Give the ALU some time to operate on the operands in A-latch/MBR and B-latch
3. Write the result into a register or into MBR (for further transfer to memory)
If this order is not followed, then the wrong result will be written to the final destination.
To pace the timing of the execution of each step, an N-phase clock is used.
Recall that a clock in the computer is a device that generate a train (serie) of pulses:

The main purpose of the clock is to pace various devices inside the computer. By "pacing", I mean: to make sure things happen in a certain order.
The simple datapath that we are constructing has 4 different phases:
- Get the next micro instruction to execute. After getting the micro instruction, the next 3 phases will actually execute the command encoded by micro instruction...
- Get the operands into A- and B-latches
- Give ALU and shifter time to compute
- Write the result to MBR or a register
To pace the execution performed by our simple datapath, we need a 4-phase clock
A 4-phase clock will have 4 different outputs and the waves outputted on each output looks like as follows:
Notice that at any moment, exactly one output of the 4 outputs of the 4-phase clock is equal to ONE and all others are ZERO.
Just imaging what would happen if you would the output signals of the 4-phase clock to trigger different D-flipflops that are found on the datapath.
As you know, when a D-flipflop is triggered by a clock signal, only then it will update its output to be equal to its input.
We can pace the executing of the datapath by connecting:
- Those parts of the datapath that need to be updated first to the phase 1 output of the 4-phase clock (so that these parts will do their work first).
- Those parts of the datapath that need to be updated next to the phase 2 output of the 4-phase clock (so that these parts will do their work next).
- And so on.
If we look carefully at what the timing relationships are in the simple datapath, we will conclude that:
- MIR must be loaded with a new micro instruction first, so the MIR register will be connected to phase 1.
- Operands must be fetched into the A- and B-latches next, so the A- and B-latches are connected to phase 2.
- After the A- and B-latches have been updated, we can (things can branch off):
  - Update MAR with the B-latch output
  - and/or let ALU & shifter do the computation (they don't need a clock signal...)
  So we can connect the MAR write signal to phase 3.
- When the ALU/shifter finishes, we can update the MBR or a register with the shifter output, so we can connect the MBR and the registers to phase 4.
We therefore get the following connections:
I have also wired the 4-phase clock in a demo program so you can experiment the result hands on. Just run:
```
	cs355-demo-dp2
 
```
How to operate:
- Switch off Reset first (key 0)
- Use switches 2 to 7 to select a micro instruction
- For each micro instruction do:
  - Look at the code in the MIR display carefully, see how it controls the data flow
  - Toggle key 1 repeatedly to make the 4-phase clock run.
  - Observe carefully the order of execution:
    - Get micro instruction
    - Load operands into A- & B-latches
    - Performs operation
    - Write back result.
  It's like "clock work"...
- Instructions that you can select:
  - 0: MOV R6, R0
  - 1: MOV R6, R0 (with reg 7 fetched in B-latch)
  - 2: MOV R7, R0 (with reg 6 fetched in B-latch)
  - 3: ADD R6, R0
  - 4: MOV MBR, R0
How a 4-phase clock is constructed in reality:
A crystal generates a clock-wave that is split off into 4 output. By placing "delays" between the cystal signal and the output, we can shift the wave in time. The "delays" are nothing more than a long piece of copper wire so that the electricity must travel a longer distance to different outputs:
The crystal element generates the following clock wave form: