/* From mhauskn: file '/home/mhauskn/cs355/mem.h' as assignment pj8 */

Define Memory Mreq Read Addr[15-0] DataIn[15-0]
	| DataOut[15-0] enTriROM enRAM RW enTriRAM;

/* Odd workaround for RW output */
Not aa notRead RW;

/* Addr circuit 1 */
Not aa Addr[6] nota6;
And aa Mreq Read nota6 enTriROM;
Not aa enTriROM notEnTriROM;

/* Tri-State buffers for ROM */
Tri-state-buffer aa romOut[0] notEnTriROM | DataOut[0];
Tri-state-buffer aa romOut[1] notEnTriROM | DataOut[1];
Tri-state-buffer aa romOut[2] notEnTriROM | DataOut[2];
Tri-state-buffer aa romOut[3] notEnTriROM | DataOut[3];
Tri-state-buffer aa romOut[4] notEnTriROM | DataOut[4];
Tri-state-buffer aa romOut[5] notEnTriROM | DataOut[5];
Tri-state-buffer aa romOut[6] notEnTriROM | DataOut[6];
Tri-state-buffer aa romOut[7] notEnTriROM | DataOut[7];
Tri-state-buffer aa romOut[8] notEnTriROM | DataOut[8];
Tri-state-buffer aa romOut[9] notEnTriROM | DataOut[9];
Tri-state-buffer aa romOut[10] notEnTriROM | DataOut[10];
Tri-state-buffer aa romOut[11] notEnTriROM | DataOut[11];
Tri-state-buffer aa romOut[12] notEnTriROM | DataOut[12];
Tri-state-buffer aa romOut[13] notEnTriROM | DataOut[13];
Tri-state-buffer aa romOut[14] notEnTriROM | DataOut[14];
Tri-state-buffer aa romOut[15] notEnTriROM | DataOut[15];

/* ROM component */
Rom64x16 aa Addr[5-0] ZERO romOut[15-0] 
     /* 0 */  10 
     /* 1 */  4168     
     /* 2 */  11     
     /* 3 */  72
	0 0 0 0  0 0 15 65535 0 0 0 0  0 0 0 0
	0 0 0 0  0 0 0 0  0 0 0 0  0 0 0 0
	0 0 0 0  0 0 0 0  0 0 0 0  0 0 0 0
	0 0 0 0  0 0 0 0  0 0 0 0; 

/* Addr circuit 2 */
Not aa Read notRead;
And aa Mreq Addr[6] enRAM;
Not aa enRAM notEnRAM;
And aa Mreq Addr[6] Read enTriRAM;
Not aa enTriRAM notEnTriRAM;

/* Ram1 */
Ram64x8 aa DataIn[15-8] Addr[5-0] Read notEnRAM Ram1Out[15-8];
/* Ram2 */
Ram64x8 aa DataIn[7-0] Addr[5-0] Read notEnRAM Ram2Out[7-0];

/* Tri-state for Ram 1 */
Tri-state-buffer aa Ram1Out[8] notEnTriRAM | DataOut[8];
Tri-state-buffer aa Ram1Out[9] notEnTriRAM | DataOut[9];
Tri-state-buffer aa Ram1Out[10] notEnTriRAM | DataOut[10];
Tri-state-buffer aa Ram1Out[11] notEnTriRAM | DataOut[11];
Tri-state-buffer aa Ram1Out[12] notEnTriRAM | DataOut[12];
Tri-state-buffer aa Ram1Out[13] notEnTriRAM | DataOut[13];
Tri-state-buffer aa Ram1Out[14] notEnTriRAM | DataOut[14];
Tri-state-buffer aa Ram1Out[15] notEnTriRAM | DataOut[15];

/* Tri-state for Ram 2 */
Tri-state-buffer aa Ram2Out[0] notEnTriRAM | DataOut[0];
Tri-state-buffer aa Ram2Out[1] notEnTriRAM | DataOut[1];
Tri-state-buffer aa Ram2Out[2] notEnTriRAM | DataOut[2];
Tri-state-buffer aa Ram2Out[3] notEnTriRAM | DataOut[3];
Tri-state-buffer aa Ram2Out[4] notEnTriRAM | DataOut[4];
Tri-state-buffer aa Ram2Out[5] notEnTriRAM | DataOut[5];
Tri-state-buffer aa Ram2Out[6] notEnTriRAM | DataOut[6];
Tri-state-buffer aa Ram2Out[7] notEnTriRAM | DataOut[7];

Endef;