/* 1 bit ALU  macroc
   Syntax: One_Bit_ALU a b carry-in sel1 sel0 | z carry-out;
   sel1 = 0, sel0 = 0 -> Add a, b carry-in
   sel1 = 0, sel0 = 1 -> Not a
   sel1 = 1, sel0 = 0 -> a Or b
   sel1 = 1, sel0 = 1 -> a AND b
*/
Define One_Bit_ALU a b c-in s[1..0] | z c-out;
 And 1a a b Out-And2;
 Or 1a a b Out-Or;
 Not 1a a Out-Not;
 Full_Adder 1a a b c-in | c-out1 Out-Sum;
 Decoder2x4 2a s[1] s[0] | l3 l2 l1 l0;
 And 2c l3 Out-And2 Out-And1;
 And 2c l2 Out-Or Out-Or1;
 And 2c l1 Out-Not Out-Not1;
 And 2c l0 Out-Sum Out-Sum1;
 And 2c l0 c-out1  c-out;
 Or 2c  Out-And1 Out-Or1 Out-Not1 Out-Sum1 z;
Endef;



Switch "0:C-in" 1a c ZERO;
Switch "1:A" 3a a ZERO;
Switch "2:B" 4a b ZERO;
Switch "3:C1" 6a x ZERO;
Switch "3:C0" 7a y ZERO;

One_Bit_ALU 1b-4b a b c x y| z c-out;

Probe "Z" 3c z;
Probe "C-out" 1c c-out;