#include "Sim.h"

/* =============================================================
   Full_Adder() circuit
   ============================================================= */
void Full_Adder( const SD &coord,
	         const Signal &a, const Signal &b, const Signal &CarryIn, 
		 const Signal &Sum, const Signal &CarryOut) 
{
   Module( coord, "FA", (CarryIn,a,b), (CarryOut,Sum) );

   Signal x, y, z;

   Xor( SD(coord,"aa"),    (a,b),        x);
   Xor( SD(coord,"ab"),    (x, CarryIn), Sum);
   And( SD(coord,"bb"),    (a, b),       y);
   And( SD(coord,"cb"),    (CarryIn, x), z);
   Or ( SD(coord,"bc-cc"), (y, z),       CarryOut);
}

void simnet()
{
   Signal x0, x1, x2, x3, y0, y1, y2, y3;   // Two 4-bit numbers
   Sig(c, 4);   // Carry outputs of the full adders
   Sig(s, 4);   // Sum bit outputs of the full adders

   Switch("aa", x3, '0', Zero);      	
   Switch("ab", x2, '1', Zero);      	
   Switch("ac", x1, '2', Zero);      	
   Switch("ad", x0, '3', Zero);      	

   Switch("af", y3, '4', Zero);      	
   Switch("ag", y2, '5', Zero);      	
   Switch("ah", y1, '6', Zero);      	
   Switch("ai", y0, '7', Zero);      	

   Full_Adder("cb", x3, y3, c[2], s[3], c[3]);
   Full_Adder("cd", x2, y2, c[1], s[2], c[2]);
   Full_Adder("cf", x1, y1, c[0], s[1], c[1]);
   Full_Adder("ch", x0, y0, Zero, s[0], c[0]);

   /* ======================================
      Probe the outputs
      ====================================== */
   Probe("eb", c[3]);           // Carry

   Probe("ed", s[3]);
   Probe("ee", s[2]);
   Probe("ef", s[1]);
   Probe("eg", s[0]);
}