/* D-latch */

#include "Sim.h"

void simnet()
{
   Signal set, reset, D, Clk, n_D;
   Sig( q0, 1 );
   Sig( n_q0, 1 );


   Switch ( "aa", D,   '0', Zero ); // Data
   Switch ( "ca", Clk, '1', One );  // Write or "clock" signal

   Not("bc", D, n_D);
   And("ad", (D, Clk),   set);
   And("bd", (n_D, Clk), reset);

   Nor ( "ae", (set,  q0),   n_q0);
   Nor ( "be", (n_q0,reset), q0);


   Probe ( "af", n_q0 );    // Probe outputs
   Probe ( "bf", q0 );      // 

   /* =================================================
      Repeat the circuit, but do not probe n_q0
      ================================================= */
   Signal Xset, Xreset, XD, XClk, Xn_D;
   Sig( Xq0, 1 );
   Sig( Xn_q0, 1 );


   Switch ( "ea", XD,   '2', Zero ); // Data
   Switch ( "ga", XClk, '3', One );  // Write or "clock" signal

   Not("fc", XD, Xn_D);
   And("ed", (XD, XClk),   Xset);
   And("fd", (Xn_D, XClk), Xreset);

   Nor ( "ee", (Xset,  Xq0),   Xn_q0);
   Nor ( "fe", (Xn_q0,Xreset), Xq0);

   Probe ( "ff", Xq0 );      // 
}