CS355 Sylabus

The Full Adder

The "staged adder" circuit is called a "Full Adder" circuit
The full adder adds 2 bits together, along with a carry in from the previous bit-addition.
The full adder generate a sum bit and a carry out bit for the next addition stage.
Thus, the full adder has 3 inputs:
- a, one of the bits to be added
- b, the other bit to be added
- c_in, the carry in bit from the previous bit addition
and it has 2 outputs:
- s, the sum bit
- c_out, the carry out bit for the next staged bit addition
Schematically:

The figure on the right shows the operation of the full adder circuit when it adds the bits 1 and 0, while the previous stage generates a carry (c_in = 1).
We can design the full adder circuit using the technique learn a couple of weeks ago (if you have forgotten it, then: click here)
Here is the boolean function in table form for the adder circuit:

c_in a b c_out s

- - - + - -

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0

1 1 0 1 0

1 1 1 1 1

You can see that:
- c_out = majority(a, b, c_in)
- s = a XOR b XOR c
The adder circuit is a very common and important circuit and electrical engineers have determine the optimal digital circuit that implements the full adder.
The optimal full adder circuit is as follows:
Here is a logic-sim circuit file implementing a full adder: click here
To make a multi-bit adder, we concatenate or cascade a number of full adder circuits.
For example, the following circuit will implement a 4-bit adder circuit that can be used to add two 4-bit numbers:
Here is a logic-sim circuit file implementing a 4-bit adder using 4 full adders: click here
To re-inforce the material learn, project 2 will now be assigned and ask you to design a multiply circuit using full adders: click here

c_in	a	b		c_out	s
-	-	-	+	-	-
0	0	0		0	0
0	0	1		0	1
0	1	0		0	1
0	1	1		1	0
1	0	0		0	1
1	0	1		1	0
1	1	0		1	0
1	1	1		1	1