Programs usually consists of many loops and the program runs a long time in one loop.
While the program is inside one loop, it only need instructions that comprises that loop and do not need other instructions.
Hence, only a few program pages need to be present in the memory while the program is executing in some loop.
When the program leaves that loop and executes inside another loop, the computer will fetch other pages from disk and replace those pages in memory from the previous loop
- A detection method to determine whther the page containing
the instruction or variable is presently in memory or not
- If the page is not present, then execute a program (subroutine) to fetch the page from disk.
- Recall that the page table entries contains a
present bit:
- The page is present in memory if the present bit for that
page is ONE (1), and otherwise, the present bit is ZERO.
- We can easily determine if a page needed by the CPU is present in memory or not.
- When the CPU tries to access a program location from a page that is not present in memory, we say that a page fault occurs.
- When a page fault is detected (using the present bit in the page table),
the program cannot continue execution until the needed page
is read in from disk.
- Note that the page is stored on disk and
must be read from disk and
the disk is sloooooow....
- Note that this situation is
the same
as when the program would read data from disk to perform
processing.... (the effect is that the program cannot continue
because it must wait for the IO transfer !!!)
- So we
know how to handle this efficiently !!!
- DMA !!!
In order to stop a program so that it can be restarted later from the point where it is stopped, you need to save the context information (see: click here)
Afterwards, another (ready) program is run (while the DMA performs the IO transfer on behave of the stopped program).
- The MMU contains many page table data structures
(for many different programs).
- The MMU has a special "current page table" register that points to the
page table used to translate program addresses from
the current program:
- Each page table is set up by the Operating System.
- Initially, the present bit of all entries are ZERO and the location of the pages on disk are initialized (the Operating System allocates the pages on disk and set up the location in the page table)
- This figures shows 3 running program in the system.
- The current program executing on the CPU is the program
at the head of the Ready Queue
- The current page table register in the MMU must also points to
the page table used by the current program.
That page table will translate program address into memory addresses and these memory address will be value in the memory frames that are occupied by pages of the current program.
- The figure above shows a memory access when the page
containing the requested program address is present in memory.
- If you look carefully in the OS, you will see there is a
page fault interrupt handling routine.
That's the magic that makes paging work !
If a page fault occurs, the page must be read from disk by the DMA.
While the DMA is busy transfering the page for the current running program, the current running program must be stop (save context !) and moved to the DMA queue - just like in the case of a IO operation, in fact, it is doing an IO operation...
Give the above statement a bit of thought:
- when the program performs a read operation,
we can (plan ahead and) write some code in the OS_Read routine
to save the context of the program.
- but in a page fault (unplanned), we cannot plan ahead
(because we do not know when a page fault will happen).
- Have we been checkmated ???? Fear not, humans are pretty ingenious...
If you don't recognize this problem, see this syllabus webpage: click here
The MMU uses the Interrupt mechanism to make an unplanned page fetch operation !!!
- When the MMU detects a page fault (present bit of the page is ZERO),
it raises the Interrupt signal:
- When the CPU detects the Interrupt signal before its
instruction fetch cycle completes, it aborts the instruction
cycle and acknowledge the interrupt:
(Note that while the CPU is executing an instruction, it very hard to abort (need lots of extra circuitry). But it is very simple to abort while it has not done fetching).
- The MMU will send out its interrupt vector (it uses vector interrupt, see: click here) and the CPU will execute the page fault (interrupt) handling routine within the Operating System.
The psuedo code for the page fault handler is as follows:
(The page fault interrupt is generated by the MMU)
0. Acknowledge Interrupt
(CPU will receive vector from the MMU
and call the Page fault interrupt handler):
============================================================
1. Save the context from the CPU into the head of
the Ready Queue
// This is needed because the current program is no longer
// ready to run
2. Perform a disk read operation using the location on disk
information in the page table.
3. Remove the head of the Ready Queue and insert it into
the DMAQ
The Operating System must also introduce an additional variable in
the PCB that can be used to indicate the reason for
the DMA disk request
- because an ordinary disk read (to obtain disk data is
handled differently than a disk read to fetch a
missing page).
4. Update current page table register of MMU to point to the page table
of the program that is the new head of the Ready Queue
(This will switch the MMU to the page table from the program
at the head of the ready queue)
5. Restore the context using the head of the Ready Queue
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- When the page fault handler finishes, another program will
be running (just like the case when the current program
performs an IO request...).
- But more importantly: the DMA has been started to fetch the missing page from disk on behave of the "former current program".
- How does the stopped program get the CPU back so that it can run again.
We have seen a similar story when we discuss the IO communication. The solution is to use interrupt.
As explained in the Interrupt handling syllabus pages (see: click here), the CPU will suspend the current running program and make an "unforseen" subroutine call to the DMA interrupt handler.
The DMA interrupt handler will execute and detects (from the newly introduced variable in the PCB) that the program that was waiting on the DMA had a page fault.
The following psuedo code details what the DMA interrupt handler:
New DMA interrupt handler:
===========================
(modified to differentiate between:
A. normal disk read
B. disk read due to a page fault
------------------------------------------------------------
0. Acknowledge Interrupt (CPU will receive vector from DMA)
and call the DMA interrupt handler
============================================================
1. Save context from CPU into the PCB at
the head of the Ready Queue
2. Remove the PCB from the DMA Queue
3. Insert this PCB at the head of the Ready Queue
4. If (program had a page fault)
{
Update page table entries in MMU
}
Update current page table register in MMU ****** (needed for paging system)
5. Restore the context using the PCB at the head
of the Ready Queue
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That's why I said very early on that the memory mapping used in paging is dynamic.... it changes from time to time.
How the mapping change depends on
- which pages are brought into the memory, and more importantly,
- which pages are removed from the memory !!! (because the memory cannot hold all the pages, and some "older" pages will have to be replaced).